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Dlabal Eduard
2025-03-27 10:43:18 +01:00
parent 7cf483ee36
commit 9abf9cb118
968 changed files with 588817 additions and 0 deletions
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Core/Src/gpio.c
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/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file gpio.c
* @brief This file provides code for the configuration
* of all used GPIO pins.
******************************************************************************
* @attention
*
* Copyright (c) 2025 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* USER CODE END Header */
/* Includes ------------------------------------------------------------------*/
#include "gpio.h"
/* USER CODE BEGIN 0 */
/* USER CODE END 0 */
/*----------------------------------------------------------------------------*/
/* Configure GPIO */
/*----------------------------------------------------------------------------*/
/* USER CODE BEGIN 1 */
/* USER CODE END 1 */
/** Configure pins as
* Analog
* Input
* Output
* EVENT_OUT
* EXTI
*/
void MX_GPIO_Init(void)
{
GPIO_InitTypeDef GPIO_InitStruct = {0};
/* GPIO Ports Clock Enable */
__HAL_RCC_GPIOD_CLK_ENABLE();
__HAL_RCC_GPIOA_CLK_ENABLE();
__HAL_RCC_GPIOB_CLK_ENABLE();
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(SS_GPIO_Port, SS_Pin, GPIO_PIN_RESET);
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(PN532_RST_GPIO_Port, PN532_RST_Pin, GPIO_PIN_RESET);
/*Configure GPIO pin Output Level */
HAL_GPIO_WritePin(PN532_REQ_GPIO_Port, PN532_REQ_Pin, GPIO_PIN_SET);
/*Configure GPIO pin : SS_Pin */
GPIO_InitStruct.Pin = SS_Pin;
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
GPIO_InitStruct.Pull = GPIO_PULLUP;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
HAL_GPIO_Init(SS_GPIO_Port, &GPIO_InitStruct);
/*Configure GPIO pins : PN532_RST_Pin PN532_REQ_Pin */
GPIO_InitStruct.Pin = PN532_RST_Pin|PN532_REQ_Pin;
GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
GPIO_InitStruct.Pull = GPIO_PULLUP;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
}
/* USER CODE BEGIN 2 */
/* USER CODE END 2 */
Core/Src/i2c.c
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/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file i2c.c
* @brief This file provides code for the configuration
* of the I2C instances.
******************************************************************************
* @attention
*
* Copyright (c) 2025 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* USER CODE END Header */
/* Includes ------------------------------------------------------------------*/
#include "i2c.h"
/* USER CODE BEGIN 0 */
/* USER CODE END 0 */
I2C_HandleTypeDef hi2c1;
/* I2C1 init function */
void MX_I2C1_Init(void)
{
/* USER CODE BEGIN I2C1_Init 0 */
/* USER CODE END I2C1_Init 0 */
/* USER CODE BEGIN I2C1_Init 1 */
/* USER CODE END I2C1_Init 1 */
hi2c1.Instance = I2C1;
hi2c1.Init.ClockSpeed = 100000;
hi2c1.Init.DutyCycle = I2C_DUTYCYCLE_2;
hi2c1.Init.OwnAddress1 = 0;
hi2c1.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT;
hi2c1.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE;
hi2c1.Init.OwnAddress2 = 0;
hi2c1.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE;
hi2c1.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE;
if (HAL_I2C_Init(&hi2c1) != HAL_OK)
{
Error_Handler();
}
/* USER CODE BEGIN I2C1_Init 2 */
/* USER CODE END I2C1_Init 2 */
}
void HAL_I2C_MspInit(I2C_HandleTypeDef* i2cHandle)
{
GPIO_InitTypeDef GPIO_InitStruct = {0};
if(i2cHandle->Instance==I2C1)
{
/* USER CODE BEGIN I2C1_MspInit 0 */
/* USER CODE END I2C1_MspInit 0 */
__HAL_RCC_GPIOB_CLK_ENABLE();
/**I2C1 GPIO Configuration
PB6 ------> I2C1_SCL
PB7 ------> I2C1_SDA
*/
GPIO_InitStruct.Pin = GPIO_PIN_6|GPIO_PIN_7;
GPIO_InitStruct.Mode = GPIO_MODE_AF_OD;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
/* I2C1 clock enable */
__HAL_RCC_I2C1_CLK_ENABLE();
/* I2C1 interrupt Init */
HAL_NVIC_SetPriority(I2C1_EV_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(I2C1_EV_IRQn);
/* USER CODE BEGIN I2C1_MspInit 1 */
/* USER CODE END I2C1_MspInit 1 */
}
}
void HAL_I2C_MspDeInit(I2C_HandleTypeDef* i2cHandle)
{
if(i2cHandle->Instance==I2C1)
{
/* USER CODE BEGIN I2C1_MspDeInit 0 */
/* USER CODE END I2C1_MspDeInit 0 */
/* Peripheral clock disable */
__HAL_RCC_I2C1_CLK_DISABLE();
/**I2C1 GPIO Configuration
PB6 ------> I2C1_SCL
PB7 ------> I2C1_SDA
*/
HAL_GPIO_DeInit(GPIOB, GPIO_PIN_6);
HAL_GPIO_DeInit(GPIOB, GPIO_PIN_7);
/* I2C1 interrupt Deinit */
HAL_NVIC_DisableIRQ(I2C1_EV_IRQn);
/* USER CODE BEGIN I2C1_MspDeInit 1 */
/* USER CODE END I2C1_MspDeInit 1 */
}
}
/* USER CODE BEGIN 1 */
/* USER CODE END 1 */
Core/Src/main.c
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/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file : main.c
* @brief : Main program body
******************************************************************************
* @attention
*
* Copyright (c) 2025 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* USER CODE END Header */
/* Includes ------------------------------------------------------------------*/
#include "main.h"
#include "i2c.h"
#include "spi.h"
#include "usart.h"
#include "gpio.h"
/* Private includes ----------------------------------------------------------*/
/* USER CODE BEGIN Includes */
#include "pn532_stm32f1.h"
/* USER CODE END Includes */
/* Private typedef -----------------------------------------------------------*/
/* USER CODE BEGIN PTD */
/* USER CODE END PTD */
/* Private define ------------------------------------------------------------*/
/* USER CODE BEGIN PD */
/* USER CODE END PD */
/* Private macro -------------------------------------------------------------*/
/* USER CODE BEGIN PM */
/* USER CODE END PM */
/* Private variables ---------------------------------------------------------*/
/* USER CODE BEGIN PV */
/* USER CODE END PV */
/* Private function prototypes -----------------------------------------------*/
void SystemClock_Config(void);
/* USER CODE BEGIN PFP */
/* USER CODE END PFP */
/* Private user code ---------------------------------------------------------*/
/* USER CODE BEGIN 0 */
/* USER CODE END 0 */
/**
* @brief The application entry point.
* @retval int
*/
int main(void)
{
/* USER CODE BEGIN 1 */
/* USER CODE END 1 */
/* MCU Configuration--------------------------------------------------------*/
/* Reset of all peripherals, Initializes the Flash interface and the Systick. */
HAL_Init();
/* USER CODE BEGIN Init */
/* USER CODE END Init */
/* Configure the system clock */
SystemClock_Config();
/* USER CODE BEGIN SysInit */
/* USER CODE END SysInit */
/* Initialize all configured peripherals */
MX_GPIO_Init();
MX_I2C1_Init();
MX_USART1_UART_Init();
MX_SPI1_Init();
/* USER CODE BEGIN 2 */
/* USER CODE END 2 */
/* Infinite loop */
/* USER CODE BEGIN WHILE */
while (1)
{
/* USER CODE END WHILE */
/* USER CODE BEGIN 3 */
}
/* USER CODE END 3 */
}
/**
* @brief System Clock Configuration
* @retval None
*/
void SystemClock_Config(void)
{
RCC_OscInitTypeDef RCC_OscInitStruct = {0};
RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
/** Initializes the RCC Oscillators according to the specified parameters
* in the RCC_OscInitTypeDef structure.
*/
RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
RCC_OscInitStruct.HSIState = RCC_HSI_ON;
RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
RCC_OscInitStruct.PLL.PLLState = RCC_PLL_NONE;
if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
{
Error_Handler();
}
/** Initializes the CPU, AHB and APB buses clocks
*/
RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
|RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_HSI;
RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_0) != HAL_OK)
{
Error_Handler();
}
}
/* USER CODE BEGIN 4 */
/* USER CODE END 4 */
/**
* @brief This function is executed in case of error occurrence.
* @retval None
*/
void Error_Handler(void)
{
/* USER CODE BEGIN Error_Handler_Debug */
/* User can add his own implementation to report the HAL error return state */
__disable_irq();
while (1)
{
}
/* USER CODE END Error_Handler_Debug */
}
#ifdef USE_FULL_ASSERT
/**
* @brief Reports the name of the source file and the source line number
* where the assert_param error has occurred.
* @param file: pointer to the source file name
* @param line: assert_param error line source number
* @retval None
*/
void assert_failed(uint8_t *file, uint32_t line)
{
/* USER CODE BEGIN 6 */
/* User can add his own implementation to report the file name and line number,
ex: printf("Wrong parameters value: file %s on line %d\r\n", file, line) */
/* USER CODE END 6 */
}
#endif /* USE_FULL_ASSERT */
Core/Src/pn532.c
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/**************************************************************************
* @file pn532.c
* @author Yehui from Waveshare
* @license BSD
*
* This is a library for the Waveshare PN532 NFC modules
*
* Check out the links above for our tutorials and wiring diagrams
* These chips use SPI communicate.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documnetation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS OR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
**************************************************************************/
#include <stdio.h>
#include "pn532.h"
const uint8_t PN532_ACK[] = {0x00, 0x00, 0xFF, 0x00, 0xFF, 0x00};
const uint8_t PN532_FRAME_START[] = {0x00, 0x00, 0xFF};
#define PN532_FRAME_MAX_LENGTH 255
#define PN532_DEFAULT_TIMEOUT 1000
/**
* @brief: Write a frame to the PN532 of at most length bytes in size.
* Note that less than length bytes might be returned!
* @retval: Returns -1 if there is an error parsing the frame.
*/
int PN532_WriteFrame(PN532* pn532, uint8_t* data, uint16_t length) {
if (length > PN532_FRAME_MAX_LENGTH || length < 1) {
return PN532_STATUS_ERROR; // Data must be array of 1 to 255 bytes.
}
// Build frame to send as:
// - Preamble (0x00)
// - Start code (0x00, 0xFF)
// - Command length (1 byte)
// - Command length checksum
// - Command bytes
// - Checksum
// - Postamble (0x00)
uint8_t frame[PN532_FRAME_MAX_LENGTH + 7];
uint8_t checksum = 0;
frame[0] = PN532_PREAMBLE;
frame[1] = PN532_STARTCODE1;
frame[2] = PN532_STARTCODE2;
for (uint8_t i = 0; i < 3; i++) {
checksum += frame[i];
}
frame[3] = length & 0xFF;
frame[4] = (~length + 1) & 0xFF;
for (uint8_t i = 0; i < length; i++) {
frame[5 + i] = data[i];
checksum += data[i];
}
frame[length + 5] = ~checksum & 0xFF;
frame[length + 6] = PN532_POSTAMBLE;
if (pn532->write_data(frame, length + 7) != PN532_STATUS_OK) {
return PN532_STATUS_ERROR;
}
return PN532_STATUS_OK;
}
/**
* @brief: Read a response frame from the PN532 of at most length bytes in size.
* Note that less than length bytes might be returned!
* @retval: Returns frame length or -1 if there is an error parsing the frame.
*/
int PN532_ReadFrame(PN532* pn532, uint8_t* response, uint16_t length) {
uint8_t buff[PN532_FRAME_MAX_LENGTH + 7];
uint8_t checksum = 0;
// Read frame with expected length of data.
pn532->read_data(buff, length + 7);
// Swallow all the 0x00 values that preceed 0xFF.
uint8_t offset = 0;
while (buff[offset] == 0x00) {
offset += 1;
if (offset >= length + 8){
pn532->log("Response frame preamble does not contain 0x00FF!");
return PN532_STATUS_ERROR;
}
}
if (buff[offset] != 0xFF) {
pn532->log("Response frame preamble does not contain 0x00FF!");
return PN532_STATUS_ERROR;
}
offset += 1;
if (offset >= length + 8) {
pn532->log("Response contains no data!");
return PN532_STATUS_ERROR;
}
// Check length & length checksum match.
uint8_t frame_len = buff[offset];
if (((frame_len + buff[offset+1]) & 0xFF) != 0) {
pn532->log("Response length checksum did not match length!");
return PN532_STATUS_ERROR;
}
// Check frame checksum value matches bytes.
for (uint8_t i = 0; i < frame_len + 1; i++) {
checksum += buff[offset + 2 + i];
}
checksum &= 0xFF;
if (checksum != 0) {
pn532->log("Response checksum did not match expected checksum");
return PN532_STATUS_ERROR;
}
// Return frame data.
for (uint8_t i = 0; i < frame_len; i++) {
response[i] = buff[offset + 2 + i];
}
return frame_len;
}
/**
* @brief: Send specified command to the PN532 and expect up to response_length.
* Will wait up to timeout seconds for a response and read a bytearray into
* response buffer.
* @param pn532: PN532 handler
* @param command: command to send
* @param response: buffer returned
* @param response_length: expected response length
* @param params: can optionally specify an array of bytes to send as parameters
* to the function call, or NULL if there is no need to send parameters.
* @param params_length: length of the argument params
* @param timeout: timout of systick
* @retval: Returns the length of response or -1 if error.
*/
int PN532_CallFunction(
PN532* pn532,
uint8_t command,
uint8_t* response,
uint16_t response_length,
uint8_t* params,
uint16_t params_length,
uint32_t timeout
) {
// Build frame data with command and parameters.
uint8_t buff[PN532_FRAME_MAX_LENGTH];
buff[0] = PN532_HOSTTOPN532;
buff[1] = command & 0xFF;
for (uint8_t i = 0; i < params_length; i++) {
buff[2 + i] = params[i];
}
// Send frame and wait for response.
if (PN532_WriteFrame(pn532, buff, params_length + 2) != PN532_STATUS_OK) {
pn532->wakeup();
pn532->log("Trying to wakeup");
return PN532_STATUS_ERROR;
}
if (!pn532->wait_ready(timeout)) {
return PN532_STATUS_ERROR;
}
// Verify ACK response and wait to be ready for function response.
pn532->read_data(buff, sizeof(PN532_ACK));
for (uint8_t i = 0; i < sizeof(PN532_ACK); i++) {
if (PN532_ACK[i] != buff[i]) {
pn532->log("Did not receive expected ACK from PN532!");
return PN532_STATUS_ERROR;
}
}
if (!pn532->wait_ready(timeout)) {
return PN532_STATUS_ERROR;
}
// Read response bytes.
int frame_len = PN532_ReadFrame(pn532, buff, response_length + 2);
// Check that response is for the called function.
if (! ((buff[0] == PN532_PN532TOHOST) && (buff[1] == (command+1)))) {
pn532->log("Received unexpected command response!");
return PN532_STATUS_ERROR;
}
// Return response data.
for (uint8_t i = 0; i < response_length; i++) {
response[i] = buff[i + 2];
}
// The the number of bytes read
return frame_len - 2;
}
/**
* @brief: Call PN532 GetFirmwareVersion function and return a buff with the IC,
* Ver, Rev, and Support values.
*/
int PN532_GetFirmwareVersion(PN532* pn532, uint8_t* version) {
// length of version: 4
if (PN532_CallFunction(pn532, PN532_COMMAND_GETFIRMWAREVERSION,
version, 4, NULL, 0, 500) == PN532_STATUS_ERROR) {
pn532->log("Failed to detect the PN532");
return PN532_STATUS_ERROR;
}
return PN532_STATUS_OK;
}
/**
* @brief: Configure the PN532 to read MiFare cards.
*/
int PN532_SamConfiguration(PN532* pn532) {
// Send SAM configuration command with configuration for:
// - 0x01, normal mode
// - 0x14, timeout 50ms * 20 = 1 second
// - 0x01, use IRQ pin
// Note that no other verification is necessary as call_function will
// check the command was executed as expected.
uint8_t params[] = {0x01, 0x14, 0x01};
PN532_CallFunction(pn532, PN532_COMMAND_SAMCONFIGURATION,
NULL, 0, params, sizeof(params), PN532_DEFAULT_TIMEOUT);
return PN532_STATUS_OK;
}
/**
* @brief: Wait for a MiFare card to be available and return its UID when found.
* Will wait up to timeout seconds and return None if no card is found,
* otherwise a bytearray with the UID of the found card is returned.
* @retval: Length of UID, or -1 if error.
*/
int PN532_ReadPassiveTarget(
PN532* pn532,
uint8_t* response,
uint8_t card_baud,
uint32_t timeout
) {
// Send passive read command for 1 card. Expect at most a 7 byte UUID.
uint8_t params[] = {0x01, card_baud};
uint8_t buff[19];
int length = PN532_CallFunction(pn532, PN532_COMMAND_INLISTPASSIVETARGET,
buff, sizeof(buff), params, sizeof(params), timeout);
if (length < 0) {
return PN532_STATUS_ERROR; // No card found
}
// Check only 1 card with up to a 7 byte UID is present.
if (buff[0] != 0x01) {
pn532->log("More than one card detected!");
return PN532_STATUS_ERROR;
}
if (buff[5] > 7) {
pn532->log("Found card with unexpectedly long UID!");
return PN532_STATUS_ERROR;
}
for (uint8_t i = 0; i < buff[5]; i++) {
response[i] = buff[6 + i];
}
return buff[5];
}
/**
* @brief: Authenticate specified block number for a MiFare classic card.
* @param uid: A byte array with the UID of the card.
* @param uid_length: Length of the UID of the card.
* @param block_number: The block to authenticate.
* @param key_number: The key type (like MIFARE_CMD_AUTH_A or MIFARE_CMD_AUTH_B).
* @param key: A byte array with the key data.
* @retval: true if the block was authenticated, or false if not authenticated.
* @retval: PN532 error code.
*/
int PN532_MifareClassicAuthenticateBlock(
PN532* pn532,
uint8_t* uid,
uint8_t uid_length,
uint16_t block_number,
uint16_t key_number,
uint8_t* key
) {
// Build parameters for InDataExchange command to authenticate MiFare card.
uint8_t response[1] = {0xFF};
uint8_t params[3 + MIFARE_UID_MAX_LENGTH + MIFARE_KEY_LENGTH];
params[0] = 0x01;
params[1] = key_number & 0xFF;
params[2] = block_number & 0xFF;
// params[3:3+keylen] = key
for (uint8_t i = 0; i < MIFARE_KEY_LENGTH; i++) {
params[3 + i] = key[i];
}
// params[3+keylen:] = uid
for (uint8_t i = 0; i < uid_length; i++) {
params[3 + MIFARE_KEY_LENGTH + i] = uid[i];
}
// Send InDataExchange request
PN532_CallFunction(pn532, PN532_COMMAND_INDATAEXCHANGE, response, sizeof(response),
params, 3 + MIFARE_KEY_LENGTH + uid_length, PN532_DEFAULT_TIMEOUT);
return response[0];
}
/**
* @brief: Read a block of data from the card. Block number should be the block
* to read.
* @param response: buffer of length 16 returned if the block is successfully read.
* @param block_number: specify a block to read.
* @retval: PN532 error code.
*/
int PN532_MifareClassicReadBlock(PN532* pn532, uint8_t* response, uint16_t block_number) {
uint8_t params[] = {0x01, MIFARE_CMD_READ, block_number & 0xFF};
uint8_t buff[MIFARE_BLOCK_LENGTH + 1];
// Send InDataExchange request to read block of MiFare data.
PN532_CallFunction(pn532, PN532_COMMAND_INDATAEXCHANGE, buff, sizeof(buff),
params, sizeof(params), PN532_DEFAULT_TIMEOUT);
// Check first response is 0x00 to show success.
if (buff[0] != PN532_ERROR_NONE) {
return buff[0];
}
for (uint8_t i = 0; i < MIFARE_BLOCK_LENGTH; i++) {
response[i] = buff[i + 1];
}
return buff[0];
}
/**
* @brief: Write a block of data to the card. Block number should be the block
* to write and data should be a byte array of length 16 with the data to
* write.
* @param data: data to write.
* @param block_number: specify a block to write.
* @retval: PN532 error code.
*/
int PN532_MifareClassicWriteBlock(PN532* pn532, uint8_t* data, uint16_t block_number) {
uint8_t params[MIFARE_BLOCK_LENGTH + 3];
uint8_t response[1];
params[0] = 0x01; // Max card numbers
params[1] = MIFARE_CMD_WRITE;
params[2] = block_number & 0xFF;
for (uint8_t i = 0; i < MIFARE_BLOCK_LENGTH; i++) {
params[3 + i] = data[i];
}
PN532_CallFunction(pn532, PN532_COMMAND_INDATAEXCHANGE, response,
sizeof(response), params, sizeof(params), PN532_DEFAULT_TIMEOUT);
return response[0];
}
/**
* @brief: Read a block of data from the card. Block number should be the block
* to read.
* @param response: buffer of length 4 returned if the block is successfully read.
* @param block_number: specify a block to read.
* @retval: PN532 error code.
*/
int PN532_Ntag2xxReadBlock(PN532* pn532, uint8_t* response, uint16_t block_number) {
uint8_t params[] = {0x01, MIFARE_CMD_READ, block_number & 0xFF};
// The response length of NTAG2xx is same as Mifare's
uint8_t buff[MIFARE_BLOCK_LENGTH + 1];
// Send InDataExchange request to read block of MiFare data.
PN532_CallFunction(pn532, PN532_COMMAND_INDATAEXCHANGE, buff, sizeof(buff),
params, sizeof(params), PN532_DEFAULT_TIMEOUT);
// Check first response is 0x00 to show success.
if (buff[0] != PN532_ERROR_NONE) {
return buff[0];
}
// Although the response length of NTAG2xx is same as Mifare's,
// only the first 4 bytes are available
for (uint8_t i = 0; i < NTAG2XX_BLOCK_LENGTH; i++) {
response[i] = buff[i + 1];
}
return buff[0];
}
/**
* @brief: Write a block of data to the card. Block number should be the block
* to write and data should be a byte array of length 4 with the data to
* write.
* @param data: data to write.
* @param block_number: specify a block to write.
* @retval: PN532 error code.
*/
int PN532_Ntag2xxWriteBlock(PN532* pn532, uint8_t* data, uint16_t block_number) {
uint8_t params[NTAG2XX_BLOCK_LENGTH + 3];
uint8_t response[1];
params[0] = 0x01; // Max card numbers
params[1] = MIFARE_ULTRALIGHT_CMD_WRITE;
params[2] = block_number & 0xFF;
for (uint8_t i = 0; i < NTAG2XX_BLOCK_LENGTH; i++) {
params[3 + i] = data[i];
}
PN532_CallFunction(pn532, PN532_COMMAND_INDATAEXCHANGE, response,
sizeof(response), params, sizeof(params), PN532_DEFAULT_TIMEOUT);
return response[0];
}
/**
* @brief: Read the GPIO states.
* @param pin_state: pin state buffer (3 bytes) returned.
* returns 3 bytes containing the pin state where:
* P3[0] = P30, P7[0] = 0, I[0] = I0,
* P3[1] = P31, P7[1] = P71, I[1] = I1,
* P3[2] = P32, P7[2] = P72, I[2] = 0,
* P3[3] = P33, P7[3] = 0, I[3] = 0,
* P3[4] = P34, P7[4] = 0, I[4] = 0,
* P3[5] = P35, P7[5] = 0, I[5] = 0,
* P3[6] = 0, P7[6] = 0, I[6] = 0,
* P3[7] = 0, P7[7] = 0, I[7] = 0,
* @retval: -1 if error
*/
int PN532_ReadGpio(PN532* pn532, uint8_t* pins_state) {
return PN532_CallFunction(pn532, PN532_COMMAND_READGPIO, pins_state, 3,
NULL, 0, PN532_DEFAULT_TIMEOUT);
}
/**
* @brief: Read the GPIO state of specified pins in (P30 ... P35).
* @param pin_number: specify the pin to read.
* @retval: true if HIGH, false if LOW
*/
bool PN532_ReadGpioP(PN532* pn532, uint8_t pin_number) {
uint8_t pins_state[3];
PN532_CallFunction(pn532, PN532_COMMAND_READGPIO, pins_state,
sizeof(pins_state), NULL, 0, PN532_DEFAULT_TIMEOUT);
if ((pin_number >= 30) && (pin_number <= 37)) {
return (pins_state[0] >> (pin_number - 30)) & 1 ? true : false;
}
if ((pin_number >= 70) && (pin_number <= 77)) {
return (pins_state[1] >> (pin_number - 70)) & 1 ? true : false;
}
return false;
}
/**
* @brief: Read the GPIO state of I0 or I1 pin.
* @param pin_number: specify the pin to read.
* @retval: true if HIGH, false if LOW
*/
bool PN532_ReadGpioI(PN532* pn532, uint8_t pin_number) {
uint8_t pins_state[3];
PN532_CallFunction(pn532, PN532_COMMAND_READGPIO, pins_state,
sizeof(pins_state), NULL, 0, PN532_DEFAULT_TIMEOUT);
if (pin_number <= 7) {
return (pins_state[2] >> pin_number) & 1 ? true : false;
}
return false;
}
/**
* @brief: Write the GPIO states.
* @param pins_state: pin state buffer (2 bytes) to write.
* no need to read pin states before write with the param pin_state
* P3 = pin_state[0], P7 = pin_state[1]
* bits:
* P3[0] = P30, P7[0] = 0,
* P3[1] = P31, P7[1] = P71,
* P3[2] = P32, P7[2] = P72,
* P3[3] = P33, P7[3] = nu,
* P3[4] = P34, P7[4] = nu,
* P3[5] = P35, P7[5] = nu,
* P3[6] = nu, P7[6] = nu,
* P3[7] = Val, P7[7] = Val,
* For each port that is validated (bit Val = 1), all the bits are applied
* simultaneously. It is not possible for example to modify the state of
* the port P32 without applying a value to the ports P30, P31, P33, P34
* and P35.
* @retval: -1 if error
*/
int PN532_WriteGpio(PN532* pn532, uint8_t* pins_state) {
uint8_t params[2];
// 0x80, the validation bit.
params[0] = 0x80 | pins_state[0];
params[1] = 0x80 | pins_state[1];
return PN532_CallFunction(pn532, PN532_COMMAND_WRITEGPIO, NULL, 0,
params, sizeof(params), PN532_DEFAULT_TIMEOUT);
}
/**
* @brief: Write the specified pin with given states.
* @param pin_number: specify the pin to write.
* @param pin_state: specify the pin state. true for HIGH, false for LOW.
* @retval: -1 if error
*/
int PN532_WriteGpioP(PN532* pn532, uint8_t pin_number, bool pin_state) {
uint8_t pins_state[2];
uint8_t params[2];
if (PN532_ReadGpio(pn532, pins_state) == PN532_STATUS_ERROR) {
return PN532_STATUS_ERROR;
}
if ((pin_number >= 30) && (pin_number <= 37)) {
if (pin_state) {
params[0] = 0x80 | pins_state[0] | 1 << (pin_number - 30);
} else {
params[0] = (0x80 | pins_state[0]) & ~(1 << (pin_number - 30));
}
params[1] = 0x00; // leave p7 unchanged
}
if ((pin_number >= 70) && (pin_number <= 77)) {
if (pin_state) {
params[1] = 0x80 | pins_state[1] | 1 << (pin_number - 70);
} else {
params[1] = (0x80 | pins_state[1]) & ~(1 << (pin_number - 70));
}
params[0] = 0x00; // leave p3 unchanged
}
return PN532_CallFunction(pn532, PN532_COMMAND_WRITEGPIO, NULL, 0,
params, sizeof(params), PN532_DEFAULT_TIMEOUT);
}
Core/Src/pn532_stm32f1.c
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/**************************************************************************
* @file pn532_stm32f1.c
* @author Yehui from Waveshare
* @license BSD
*
* This implements the peripheral interfaces.
*
* Check out the links above for our tutorials and wiring diagrams
* These chips use SPI communicate.
*
* Permission is hereby granted, free of charge, to any person obtaining a copy
* of this software and associated documnetation files (the "Software"), to deal
* in the Software without restriction, including without limitation the rights
* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
* copies of the Software, and to permit persons to whom the Software is
* furished to do so, subject to the following conditions:
*
* The above copyright notice and this permission notice shall be included in
* all copies or substantial portions of the Software.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
* FITNESS OR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
* LIABILITY WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
* THE SOFTWARE.
**************************************************************************/
#include "stm32f1xx_hal.h"
#include "main.h"
#include "pn532_stm32f1.h"
#define _SPI_STATREAD 0x02
#define _SPI_DATAWRITE 0x01
#define _SPI_DATAREAD 0x03
#define _SPI_READY 0x01
#define _SPI_TIMEOUT 10
// This indicates if the bits read/write should be reversed
#define _SPI_HARDWARE_LSB
#define _I2C_ADDRESS 0x48
#define _I2C_TIMEOUT 10
extern SPI_HandleTypeDef hspi1;
extern I2C_HandleTypeDef hi2c1;
/**************************************************************************
* Reset and Log implements
**************************************************************************/
int PN532_Reset(void) {
HAL_GPIO_WritePin(PN532_RST_GPIO_Port, PN532_RST_Pin, GPIO_PIN_SET);
HAL_Delay(100);
HAL_GPIO_WritePin(PN532_RST_GPIO_Port, PN532_RST_Pin, GPIO_PIN_RESET);
HAL_Delay(500);
HAL_GPIO_WritePin(PN532_RST_GPIO_Port, PN532_RST_Pin, GPIO_PIN_SET);
HAL_Delay(100);
return PN532_STATUS_OK;
}
void PN532_Log(const char* log) {
printf("%s\r\n", log);
}
void PN532_Init(PN532* pn532) {
PN532_SPI_Init(pn532);
}
/**************************************************************************
* End: Reset and Log implements
**************************************************************************/
/**************************************************************************
* SPI
**************************************************************************/
uint8_t reverse_bit(uint8_t num) {
uint8_t result = 0;
for (uint8_t i = 0; i < 8; i++) {
result <<= 1;
result += (num & 1);
num >>= 1;
}
return result;
}
void spi_rw(uint8_t* data, uint8_t count) {
HAL_GPIO_WritePin(SS_GPIO_Port, SS_Pin, GPIO_PIN_RESET);
HAL_Delay(1);
#ifndef _SPI_HARDWARE_LSB
for (uint8_t i = 0; i < count; i++) {
data[i] = reverse_bit(data[i]);
}
HAL_SPI_TransmitReceive(&hspi1, data, data, count, _SPI_TIMEOUT);
for (uint8_t i = 0; i < count; i++) {
data[i] = reverse_bit(data[i]);
}
#else
HAL_SPI_TransmitReceive(&hspi1, data, data, count, _SPI_TIMEOUT);
#endif
HAL_Delay(1);
HAL_GPIO_WritePin(SS_GPIO_Port, SS_Pin, GPIO_PIN_SET);
}
int PN532_SPI_ReadData(uint8_t* data, uint16_t count) {
uint8_t frame[count + 1];
frame[0] = _SPI_DATAREAD;
HAL_Delay(5);
spi_rw(frame, count + 1);
for (uint8_t i = 0; i < count; i++) {
data[i] = frame[i + 1];
}
return PN532_STATUS_OK;
}
int PN532_SPI_WriteData(uint8_t *data, uint16_t count) {
uint8_t frame[count + 1];
frame[0] = _SPI_DATAWRITE;
for (uint8_t i = 0; i < count; i++) {
frame[i + 1] = data[i];
}
spi_rw(frame, count + 1);
return PN532_STATUS_OK;
}
bool PN532_SPI_WaitReady(uint32_t timeout) {
uint8_t status[] = {_SPI_STATREAD, 0x00};
uint32_t tickstart = HAL_GetTick();
while (HAL_GetTick() - tickstart < timeout) {
HAL_Delay(10);
spi_rw(status, sizeof(status));
if (status[1] == _SPI_READY) {
return true;
} else {
HAL_Delay(5);
}
}
return false;
}
int PN532_SPI_Wakeup(void) {
// Send any special commands/data to wake up PN532
uint8_t data[] = {0x00};
HAL_Delay(1000);
HAL_GPIO_WritePin(SS_GPIO_Port, SS_Pin, GPIO_PIN_RESET);
HAL_Delay(2); // T_osc_start
spi_rw(data, 1);
HAL_Delay(1000);
return PN532_STATUS_OK;
}
void PN532_SPI_Init(PN532* pn532) {
// init the pn532 functions
pn532->reset = PN532_Reset;
pn532->read_data = PN532_SPI_ReadData;
pn532->write_data = PN532_SPI_WriteData;
pn532->wait_ready = PN532_SPI_WaitReady;
pn532->wakeup = PN532_SPI_Wakeup;
pn532->log = PN532_Log;
// hardware wakeup
pn532->wakeup();
}
/**************************************************************************
* End: SPI
**************************************************************************/
/**************************************************************************
* I2C
**************************************************************************/
void i2c_read(uint8_t* data, uint16_t count) {
HAL_I2C_Master_Receive(&hi2c1, _I2C_ADDRESS, data, count, _I2C_TIMEOUT);
}
void i2c_write(uint8_t* data, uint16_t count) {
HAL_I2C_Master_Transmit(&hi2c1, _I2C_ADDRESS, data, count, _I2C_TIMEOUT);
}
int PN532_I2C_ReadData(uint8_t* data, uint16_t count) {
uint8_t status[] = {0x00};
uint8_t frame[count + 1];
i2c_read(status, sizeof(status));
if (status[0] != PN532_I2C_READY) {
return PN532_STATUS_ERROR;
}
i2c_read(frame, count + 1);
for (uint8_t i = 0; i < count; i++) {
data[i] = frame[i + 1];
}
return PN532_STATUS_OK;
}
int PN532_I2C_WriteData(uint8_t *data, uint16_t count) {
i2c_write(data, count);
return PN532_STATUS_OK;
}
bool PN532_I2C_WaitReady(uint32_t timeout) {
uint8_t status[] = {0x00};
uint32_t tickstart = HAL_GetTick();
while (HAL_GetTick() - tickstart < timeout) {
i2c_read(status, sizeof(status));
if (status[0] == PN532_I2C_READY) {
return true;
} else {
HAL_Delay(5);
}
}
return false;
}
int PN532_I2C_Wakeup(void) {
// TODO
HAL_GPIO_WritePin(PN532_REQ_GPIO_Port, PN532_REQ_Pin, GPIO_PIN_SET);
HAL_Delay(100);
HAL_GPIO_WritePin(PN532_REQ_GPIO_Port, PN532_REQ_Pin, GPIO_PIN_RESET);
HAL_Delay(100);
HAL_GPIO_WritePin(PN532_REQ_GPIO_Port, PN532_REQ_Pin, GPIO_PIN_SET);
HAL_Delay(500);
return PN532_STATUS_OK;
}
void PN532_I2C_Init(PN532* pn532) {
// init the pn532 functions
pn532->reset = PN532_Reset;
pn532->read_data = PN532_I2C_ReadData;
pn532->write_data = PN532_I2C_WriteData;
pn532->wait_ready = PN532_I2C_WaitReady;
pn532->wakeup = PN532_I2C_Wakeup;
pn532->log = PN532_Log;
// hardware wakeup
pn532->wakeup();
}
/**************************************************************************
* End: I2C
**************************************************************************/
Core/Src/spi.c
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/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file spi.c
* @brief This file provides code for the configuration
* of the SPI instances.
******************************************************************************
* @attention
*
* Copyright (c) 2025 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* USER CODE END Header */
/* Includes ------------------------------------------------------------------*/
#include "spi.h"
/* USER CODE BEGIN 0 */
/* USER CODE END 0 */
SPI_HandleTypeDef hspi1;
/* SPI1 init function */
void MX_SPI1_Init(void)
{
/* USER CODE BEGIN SPI1_Init 0 */
/* USER CODE END SPI1_Init 0 */
/* USER CODE BEGIN SPI1_Init 1 */
/* USER CODE END SPI1_Init 1 */
hspi1.Instance = SPI1;
hspi1.Init.Mode = SPI_MODE_MASTER;
hspi1.Init.Direction = SPI_DIRECTION_2LINES;
hspi1.Init.DataSize = SPI_DATASIZE_8BIT;
hspi1.Init.CLKPolarity = SPI_POLARITY_LOW;
hspi1.Init.CLKPhase = SPI_PHASE_1EDGE;
hspi1.Init.NSS = SPI_NSS_SOFT;
hspi1.Init.BaudRatePrescaler = SPI_BAUDRATEPRESCALER_2;
hspi1.Init.FirstBit = SPI_FIRSTBIT_MSB;
hspi1.Init.TIMode = SPI_TIMODE_DISABLE;
hspi1.Init.CRCCalculation = SPI_CRCCALCULATION_DISABLE;
hspi1.Init.CRCPolynomial = 10;
if (HAL_SPI_Init(&hspi1) != HAL_OK)
{
Error_Handler();
}
/* USER CODE BEGIN SPI1_Init 2 */
/* USER CODE END SPI1_Init 2 */
}
void HAL_SPI_MspInit(SPI_HandleTypeDef* spiHandle)
{
GPIO_InitTypeDef GPIO_InitStruct = {0};
if(spiHandle->Instance==SPI1)
{
/* USER CODE BEGIN SPI1_MspInit 0 */
/* USER CODE END SPI1_MspInit 0 */
/* SPI1 clock enable */
__HAL_RCC_SPI1_CLK_ENABLE();
__HAL_RCC_GPIOA_CLK_ENABLE();
/**SPI1 GPIO Configuration
PA5 ------> SPI1_SCK
PA6 ------> SPI1_MISO
PA7 ------> SPI1_MOSI
*/
GPIO_InitStruct.Pin = GPIO_PIN_5|GPIO_PIN_7;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
GPIO_InitStruct.Pin = GPIO_PIN_6;
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
GPIO_InitStruct.Pull = GPIO_NOPULL;
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
/* USER CODE BEGIN SPI1_MspInit 1 */
/* USER CODE END SPI1_MspInit 1 */
}
}
void HAL_SPI_MspDeInit(SPI_HandleTypeDef* spiHandle)
{
if(spiHandle->Instance==SPI1)
{
/* USER CODE BEGIN SPI1_MspDeInit 0 */
/* USER CODE END SPI1_MspDeInit 0 */
/* Peripheral clock disable */
__HAL_RCC_SPI1_CLK_DISABLE();
/**SPI1 GPIO Configuration
PA5 ------> SPI1_SCK
PA6 ------> SPI1_MISO
PA7 ------> SPI1_MOSI
*/
HAL_GPIO_DeInit(GPIOA, GPIO_PIN_5|GPIO_PIN_6|GPIO_PIN_7);
/* USER CODE BEGIN SPI1_MspDeInit 1 */
/* USER CODE END SPI1_MspDeInit 1 */
}
}
/* USER CODE BEGIN 1 */
/* USER CODE END 1 */
Core/Src/stm32f1xx_hal_msp.c
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/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file stm32f1xx_hal_msp.c
* @brief This file provides code for the MSP Initialization
* and de-Initialization codes.
******************************************************************************
* @attention
*
* Copyright (c) 2025 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* USER CODE END Header */
/* Includes ------------------------------------------------------------------*/
#include "main.h"
/* USER CODE BEGIN Includes */
/* USER CODE END Includes */
/* Private typedef -----------------------------------------------------------*/
/* USER CODE BEGIN TD */
/* USER CODE END TD */
/* Private define ------------------------------------------------------------*/
/* USER CODE BEGIN Define */
/* USER CODE END Define */
/* Private macro -------------------------------------------------------------*/
/* USER CODE BEGIN Macro */
/* USER CODE END Macro */
/* Private variables ---------------------------------------------------------*/
/* USER CODE BEGIN PV */
/* USER CODE END PV */
/* Private function prototypes -----------------------------------------------*/
/* USER CODE BEGIN PFP */
/* USER CODE END PFP */
/* External functions --------------------------------------------------------*/
/* USER CODE BEGIN ExternalFunctions */
/* USER CODE END ExternalFunctions */
/* USER CODE BEGIN 0 */
/* USER CODE END 0 */
/**
* Initializes the Global MSP.
*/
void HAL_MspInit(void)
{
/* USER CODE BEGIN MspInit 0 */
/* USER CODE END MspInit 0 */
__HAL_RCC_AFIO_CLK_ENABLE();
__HAL_RCC_PWR_CLK_ENABLE();
/* System interrupt init*/
/** DISABLE: JTAG-DP Disabled and SW-DP Disabled
*/
__HAL_AFIO_REMAP_SWJ_DISABLE();
/* USER CODE BEGIN MspInit 1 */
/* USER CODE END MspInit 1 */
}
/* USER CODE BEGIN 1 */
/* USER CODE END 1 */
Core/Src/stm32f1xx_it.c
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/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file stm32f1xx_it.c
* @brief Interrupt Service Routines.
******************************************************************************
* @attention
*
* Copyright (c) 2025 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* USER CODE END Header */
/* Includes ------------------------------------------------------------------*/
#include "main.h"
#include "stm32f1xx_it.h"
/* Private includes ----------------------------------------------------------*/
/* USER CODE BEGIN Includes */
/* USER CODE END Includes */
/* Private typedef -----------------------------------------------------------*/
/* USER CODE BEGIN TD */
/* USER CODE END TD */
/* Private define ------------------------------------------------------------*/
/* USER CODE BEGIN PD */
/* USER CODE END PD */
/* Private macro -------------------------------------------------------------*/
/* USER CODE BEGIN PM */
/* USER CODE END PM */
/* Private variables ---------------------------------------------------------*/
/* USER CODE BEGIN PV */
/* USER CODE END PV */
/* Private function prototypes -----------------------------------------------*/
/* USER CODE BEGIN PFP */
/* USER CODE END PFP */
/* Private user code ---------------------------------------------------------*/
/* USER CODE BEGIN 0 */
/* USER CODE END 0 */
/* External variables --------------------------------------------------------*/
extern I2C_HandleTypeDef hi2c1;
extern UART_HandleTypeDef huart1;
/* USER CODE BEGIN EV */
/* USER CODE END EV */
/******************************************************************************/
/* Cortex-M3 Processor Interruption and Exception Handlers */
/******************************************************************************/
/**
* @brief This function handles Non maskable interrupt.
*/
void NMI_Handler(void)
{
/* USER CODE BEGIN NonMaskableInt_IRQn 0 */
/* USER CODE END NonMaskableInt_IRQn 0 */
/* USER CODE BEGIN NonMaskableInt_IRQn 1 */
while (1)
{
}
/* USER CODE END NonMaskableInt_IRQn 1 */
}
/**
* @brief This function handles Hard fault interrupt.
*/
void HardFault_Handler(void)
{
/* USER CODE BEGIN HardFault_IRQn 0 */
/* USER CODE END HardFault_IRQn 0 */
while (1)
{
/* USER CODE BEGIN W1_HardFault_IRQn 0 */
/* USER CODE END W1_HardFault_IRQn 0 */
}
}
/**
* @brief This function handles Memory management fault.
*/
void MemManage_Handler(void)
{
/* USER CODE BEGIN MemoryManagement_IRQn 0 */
/* USER CODE END MemoryManagement_IRQn 0 */
while (1)
{
/* USER CODE BEGIN W1_MemoryManagement_IRQn 0 */
/* USER CODE END W1_MemoryManagement_IRQn 0 */
}
}
/**
* @brief This function handles Prefetch fault, memory access fault.
*/
void BusFault_Handler(void)
{
/* USER CODE BEGIN BusFault_IRQn 0 */
/* USER CODE END BusFault_IRQn 0 */
while (1)
{
/* USER CODE BEGIN W1_BusFault_IRQn 0 */
/* USER CODE END W1_BusFault_IRQn 0 */
}
}
/**
* @brief This function handles Undefined instruction or illegal state.
*/
void UsageFault_Handler(void)
{
/* USER CODE BEGIN UsageFault_IRQn 0 */
/* USER CODE END UsageFault_IRQn 0 */
while (1)
{
/* USER CODE BEGIN W1_UsageFault_IRQn 0 */
/* USER CODE END W1_UsageFault_IRQn 0 */
}
}
/**
* @brief This function handles System service call via SWI instruction.
*/
void SVC_Handler(void)
{
/* USER CODE BEGIN SVCall_IRQn 0 */
/* USER CODE END SVCall_IRQn 0 */
/* USER CODE BEGIN SVCall_IRQn 1 */
/* USER CODE END SVCall_IRQn 1 */
}
/**
* @brief This function handles Debug monitor.
*/
void DebugMon_Handler(void)
{
/* USER CODE BEGIN DebugMonitor_IRQn 0 */
/* USER CODE END DebugMonitor_IRQn 0 */
/* USER CODE BEGIN DebugMonitor_IRQn 1 */
/* USER CODE END DebugMonitor_IRQn 1 */
}
/**
* @brief This function handles Pendable request for system service.
*/
void PendSV_Handler(void)
{
/* USER CODE BEGIN PendSV_IRQn 0 */
/* USER CODE END PendSV_IRQn 0 */
/* USER CODE BEGIN PendSV_IRQn 1 */
/* USER CODE END PendSV_IRQn 1 */
}
/**
* @brief This function handles System tick timer.
*/
void SysTick_Handler(void)
{
/* USER CODE BEGIN SysTick_IRQn 0 */
/* USER CODE END SysTick_IRQn 0 */
HAL_IncTick();
/* USER CODE BEGIN SysTick_IRQn 1 */
/* USER CODE END SysTick_IRQn 1 */
}
/******************************************************************************/
/* STM32F1xx Peripheral Interrupt Handlers */
/* Add here the Interrupt Handlers for the used peripherals. */
/* For the available peripheral interrupt handler names, */
/* please refer to the startup file (startup_stm32f1xx.s). */
/******************************************************************************/
/**
* @brief This function handles I2C1 event interrupt.
*/
void I2C1_EV_IRQHandler(void)
{
/* USER CODE BEGIN I2C1_EV_IRQn 0 */
/* USER CODE END I2C1_EV_IRQn 0 */
HAL_I2C_EV_IRQHandler(&hi2c1);
/* USER CODE BEGIN I2C1_EV_IRQn 1 */
/* USER CODE END I2C1_EV_IRQn 1 */
}
/**
* @brief This function handles USART1 global interrupt.
*/
void USART1_IRQHandler(void)
{
/* USER CODE BEGIN USART1_IRQn 0 */
/* USER CODE END USART1_IRQn 0 */
HAL_UART_IRQHandler(&huart1);
/* USER CODE BEGIN USART1_IRQn 1 */
/* USER CODE END USART1_IRQn 1 */
}
/* USER CODE BEGIN 1 */
/* USER CODE END 1 */
Core/Src/syscalls.c
+176
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/**
******************************************************************************
* @file syscalls.c
* @author Auto-generated by STM32CubeMX
* @brief Minimal System calls file
*
* For more information about which c-functions
* need which of these lowlevel functions
* please consult the Newlib libc-manual
******************************************************************************
* @attention
*
* Copyright (c) 2020-2024 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Includes */
#include <sys/stat.h>
#include <stdlib.h>
#include <errno.h>
#include <stdio.h>
#include <signal.h>
#include <time.h>
#include <sys/time.h>
#include <sys/times.h>
/* Variables */
extern int __io_putchar(int ch) __attribute__((weak));
extern int __io_getchar(void) __attribute__((weak));
char *__env[1] = { 0 };
char **environ = __env;
/* Functions */
void initialise_monitor_handles()
{
}
int _getpid(void)
{
return 1;
}
int _kill(int pid, int sig)
{
(void)pid;
(void)sig;
errno = EINVAL;
return -1;
}
void _exit (int status)
{
_kill(status, -1);
while (1) {} /* Make sure we hang here */
}
__attribute__((weak)) int _read(int file, char *ptr, int len)
{
(void)file;
int DataIdx;
for (DataIdx = 0; DataIdx < len; DataIdx++)
{
*ptr++ = __io_getchar();
}
return len;
}
__attribute__((weak)) int _write(int file, char *ptr, int len)
{
(void)file;
int DataIdx;
for (DataIdx = 0; DataIdx < len; DataIdx++)
{
__io_putchar(*ptr++);
}
return len;
}
int _close(int file)
{
(void)file;
return -1;
}
int _fstat(int file, struct stat *st)
{
(void)file;
st->st_mode = S_IFCHR;
return 0;
}
int _isatty(int file)
{
(void)file;
return 1;
}
int _lseek(int file, int ptr, int dir)
{
(void)file;
(void)ptr;
(void)dir;
return 0;
}
int _open(char *path, int flags, ...)
{
(void)path;
(void)flags;
/* Pretend like we always fail */
return -1;
}
int _wait(int *status)
{
(void)status;
errno = ECHILD;
return -1;
}
int _unlink(char *name)
{
(void)name;
errno = ENOENT;
return -1;
}
int _times(struct tms *buf)
{
(void)buf;
return -1;
}
int _stat(char *file, struct stat *st)
{
(void)file;
st->st_mode = S_IFCHR;
return 0;
}
int _link(char *old, char *new)
{
(void)old;
(void)new;
errno = EMLINK;
return -1;
}
int _fork(void)
{
errno = EAGAIN;
return -1;
}
int _execve(char *name, char **argv, char **env)
{
(void)name;
(void)argv;
(void)env;
errno = ENOMEM;
return -1;
}
Core/Src/sysmem.c
+79
View File
@@ -0,0 +1,79 @@
/**
******************************************************************************
* @file sysmem.c
* @author Generated by STM32CubeMX
* @brief System Memory calls file
*
* For more information about which C functions
* need which of these lowlevel functions
* please consult the newlib libc manual
******************************************************************************
* @attention
*
* Copyright (c) 2024 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* Includes */
#include <errno.h>
#include <stdint.h>
/**
* Pointer to the current high watermark of the heap usage
*/
static uint8_t *__sbrk_heap_end = NULL;
/**
* @brief _sbrk() allocates memory to the newlib heap and is used by malloc
* and others from the C library
*
* @verbatim
* ############################################################################
* # .data # .bss # newlib heap # MSP stack #
* # # # # Reserved by _Min_Stack_Size #
* ############################################################################
* ^-- RAM start ^-- _end _estack, RAM end --^
* @endverbatim
*
* This implementation starts allocating at the '_end' linker symbol
* The '_Min_Stack_Size' linker symbol reserves a memory for the MSP stack
* The implementation considers '_estack' linker symbol to be RAM end
* NOTE: If the MSP stack, at any point during execution, grows larger than the
* reserved size, please increase the '_Min_Stack_Size'.
*
* @param incr Memory size
* @return Pointer to allocated memory
*/
void *_sbrk(ptrdiff_t incr)
{
extern uint8_t _end; /* Symbol defined in the linker script */
extern uint8_t _estack; /* Symbol defined in the linker script */
extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */
const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size;
const uint8_t *max_heap = (uint8_t *)stack_limit;
uint8_t *prev_heap_end;
/* Initialize heap end at first call */
if (NULL == __sbrk_heap_end)
{
__sbrk_heap_end = &_end;
}
/* Protect heap from growing into the reserved MSP stack */
if (__sbrk_heap_end + incr > max_heap)
{
errno = ENOMEM;
return (void *)-1;
}
prev_heap_end = __sbrk_heap_end;
__sbrk_heap_end += incr;
return (void *)prev_heap_end;
}
Core/Src/system_stm32f1xx.c
+406
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@@ -0,0 +1,406 @@
/**
******************************************************************************
* @file system_stm32f1xx.c
* @author MCD Application Team
* @brief CMSIS Cortex-M3 Device Peripheral Access Layer System Source File.
*
* 1. This file provides two functions and one global variable to be called from
* user application:
* - SystemInit(): Setups the system clock (System clock source, PLL Multiplier
* factors, AHB/APBx prescalers and Flash settings).
* This function is called at startup just after reset and
* before branch to main program. This call is made inside
* the "startup_stm32f1xx_xx.s" file.
*
* - SystemCoreClock variable: Contains the core clock (HCLK), it can be used
* by the user application to setup the SysTick
* timer or configure other parameters.
*
* - SystemCoreClockUpdate(): Updates the variable SystemCoreClock and must
* be called whenever the core clock is changed
* during program execution.
*
* 2. After each device reset the HSI (8 MHz) is used as system clock source.
* Then SystemInit() function is called, in "startup_stm32f1xx_xx.s" file, to
* configure the system clock before to branch to main program.
*
* 4. The default value of HSE crystal is set to 8 MHz (or 25 MHz, depending on
* the product used), refer to "HSE_VALUE".
* When HSE is used as system clock source, directly or through PLL, and you
* are using different crystal you have to adapt the HSE value to your own
* configuration.
*
******************************************************************************
* @attention
*
* Copyright (c) 2017-2021 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/** @addtogroup CMSIS
* @{
*/
/** @addtogroup stm32f1xx_system
* @{
*/
/** @addtogroup STM32F1xx_System_Private_Includes
* @{
*/
#include "stm32f1xx.h"
/**
* @}
*/
/** @addtogroup STM32F1xx_System_Private_TypesDefinitions
* @{
*/
/**
* @}
*/
/** @addtogroup STM32F1xx_System_Private_Defines
* @{
*/
#if !defined (HSE_VALUE)
#define HSE_VALUE 8000000U /*!< Default value of the External oscillator in Hz.
This value can be provided and adapted by the user application. */
#endif /* HSE_VALUE */
#if !defined (HSI_VALUE)
#define HSI_VALUE 8000000U /*!< Default value of the Internal oscillator in Hz.
This value can be provided and adapted by the user application. */
#endif /* HSI_VALUE */
/*!< Uncomment the following line if you need to use external SRAM */
#if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG)
/* #define DATA_IN_ExtSRAM */
#endif /* STM32F100xE || STM32F101xE || STM32F101xG || STM32F103xE || STM32F103xG */
/* Note: Following vector table addresses must be defined in line with linker
configuration. */
/*!< Uncomment the following line if you need to relocate the vector table
anywhere in Flash or Sram, else the vector table is kept at the automatic
remap of boot address selected */
/* #define USER_VECT_TAB_ADDRESS */
#if defined(USER_VECT_TAB_ADDRESS)
/*!< Uncomment the following line if you need to relocate your vector Table
in Sram else user remap will be done in Flash. */
/* #define VECT_TAB_SRAM */
#if defined(VECT_TAB_SRAM)
#define VECT_TAB_BASE_ADDRESS SRAM_BASE /*!< Vector Table base address field.
This value must be a multiple of 0x200. */
#define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table base offset field.
This value must be a multiple of 0x200. */
#else
#define VECT_TAB_BASE_ADDRESS FLASH_BASE /*!< Vector Table base address field.
This value must be a multiple of 0x200. */
#define VECT_TAB_OFFSET 0x00000000U /*!< Vector Table base offset field.
This value must be a multiple of 0x200. */
#endif /* VECT_TAB_SRAM */
#endif /* USER_VECT_TAB_ADDRESS */
/******************************************************************************/
/**
* @}
*/
/** @addtogroup STM32F1xx_System_Private_Macros
* @{
*/
/**
* @}
*/
/** @addtogroup STM32F1xx_System_Private_Variables
* @{
*/
/* This variable is updated in three ways:
1) by calling CMSIS function SystemCoreClockUpdate()
2) by calling HAL API function HAL_RCC_GetHCLKFreq()
3) each time HAL_RCC_ClockConfig() is called to configure the system clock frequency
Note: If you use this function to configure the system clock; then there
is no need to call the 2 first functions listed above, since SystemCoreClock
variable is updated automatically.
*/
uint32_t SystemCoreClock = 8000000;
const uint8_t AHBPrescTable[16U] = {0, 0, 0, 0, 0, 0, 0, 0, 1, 2, 3, 4, 6, 7, 8, 9};
const uint8_t APBPrescTable[8U] = {0, 0, 0, 0, 1, 2, 3, 4};
/**
* @}
*/
/** @addtogroup STM32F1xx_System_Private_FunctionPrototypes
* @{
*/
#if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG)
#ifdef DATA_IN_ExtSRAM
static void SystemInit_ExtMemCtl(void);
#endif /* DATA_IN_ExtSRAM */
#endif /* STM32F100xE || STM32F101xE || STM32F101xG || STM32F103xE || STM32F103xG */
/**
* @}
*/
/** @addtogroup STM32F1xx_System_Private_Functions
* @{
*/
/**
* @brief Setup the microcontroller system
* Initialize the Embedded Flash Interface, the PLL and update the
* SystemCoreClock variable.
* @note This function should be used only after reset.
* @param None
* @retval None
*/
void SystemInit (void)
{
#if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG)
#ifdef DATA_IN_ExtSRAM
SystemInit_ExtMemCtl();
#endif /* DATA_IN_ExtSRAM */
#endif
/* Configure the Vector Table location -------------------------------------*/
#if defined(USER_VECT_TAB_ADDRESS)
SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM. */
#endif /* USER_VECT_TAB_ADDRESS */
}
/**
* @brief Update SystemCoreClock variable according to Clock Register Values.
* The SystemCoreClock variable contains the core clock (HCLK), it can
* be used by the user application to setup the SysTick timer or configure
* other parameters.
*
* @note Each time the core clock (HCLK) changes, this function must be called
* to update SystemCoreClock variable value. Otherwise, any configuration
* based on this variable will be incorrect.
*
* @note - The system frequency computed by this function is not the real
* frequency in the chip. It is calculated based on the predefined
* constant and the selected clock source:
*
* - If SYSCLK source is HSI, SystemCoreClock will contain the HSI_VALUE(*)
*
* - If SYSCLK source is HSE, SystemCoreClock will contain the HSE_VALUE(**)
*
* - If SYSCLK source is PLL, SystemCoreClock will contain the HSE_VALUE(**)
* or HSI_VALUE(*) multiplied by the PLL factors.
*
* (*) HSI_VALUE is a constant defined in stm32f1xx.h file (default value
* 8 MHz) but the real value may vary depending on the variations
* in voltage and temperature.
*
* (**) HSE_VALUE is a constant defined in stm32f1xx.h file (default value
* 8 MHz or 25 MHz, depending on the product used), user has to ensure
* that HSE_VALUE is same as the real frequency of the crystal used.
* Otherwise, this function may have wrong result.
*
* - The result of this function could be not correct when using fractional
* value for HSE crystal.
* @param None
* @retval None
*/
void SystemCoreClockUpdate (void)
{
uint32_t tmp = 0U, pllmull = 0U, pllsource = 0U;
#if defined(STM32F105xC) || defined(STM32F107xC)
uint32_t prediv1source = 0U, prediv1factor = 0U, prediv2factor = 0U, pll2mull = 0U;
#endif /* STM32F105xC */
#if defined(STM32F100xB) || defined(STM32F100xE)
uint32_t prediv1factor = 0U;
#endif /* STM32F100xB or STM32F100xE */
/* Get SYSCLK source -------------------------------------------------------*/
tmp = RCC->CFGR & RCC_CFGR_SWS;
switch (tmp)
{
case 0x00U: /* HSI used as system clock */
SystemCoreClock = HSI_VALUE;
break;
case 0x04U: /* HSE used as system clock */
SystemCoreClock = HSE_VALUE;
break;
case 0x08U: /* PLL used as system clock */
/* Get PLL clock source and multiplication factor ----------------------*/
pllmull = RCC->CFGR & RCC_CFGR_PLLMULL;
pllsource = RCC->CFGR & RCC_CFGR_PLLSRC;
#if !defined(STM32F105xC) && !defined(STM32F107xC)
pllmull = ( pllmull >> 18U) + 2U;
if (pllsource == 0x00U)
{
/* HSI oscillator clock divided by 2 selected as PLL clock entry */
SystemCoreClock = (HSI_VALUE >> 1U) * pllmull;
}
else
{
#if defined(STM32F100xB) || defined(STM32F100xE)
prediv1factor = (RCC->CFGR2 & RCC_CFGR2_PREDIV1) + 1U;
/* HSE oscillator clock selected as PREDIV1 clock entry */
SystemCoreClock = (HSE_VALUE / prediv1factor) * pllmull;
#else
/* HSE selected as PLL clock entry */
if ((RCC->CFGR & RCC_CFGR_PLLXTPRE) != (uint32_t)RESET)
{/* HSE oscillator clock divided by 2 */
SystemCoreClock = (HSE_VALUE >> 1U) * pllmull;
}
else
{
SystemCoreClock = HSE_VALUE * pllmull;
}
#endif
}
#else
pllmull = pllmull >> 18U;
if (pllmull != 0x0DU)
{
pllmull += 2U;
}
else
{ /* PLL multiplication factor = PLL input clock * 6.5 */
pllmull = 13U / 2U;
}
if (pllsource == 0x00U)
{
/* HSI oscillator clock divided by 2 selected as PLL clock entry */
SystemCoreClock = (HSI_VALUE >> 1U) * pllmull;
}
else
{/* PREDIV1 selected as PLL clock entry */
/* Get PREDIV1 clock source and division factor */
prediv1source = RCC->CFGR2 & RCC_CFGR2_PREDIV1SRC;
prediv1factor = (RCC->CFGR2 & RCC_CFGR2_PREDIV1) + 1U;
if (prediv1source == 0U)
{
/* HSE oscillator clock selected as PREDIV1 clock entry */
SystemCoreClock = (HSE_VALUE / prediv1factor) * pllmull;
}
else
{/* PLL2 clock selected as PREDIV1 clock entry */
/* Get PREDIV2 division factor and PLL2 multiplication factor */
prediv2factor = ((RCC->CFGR2 & RCC_CFGR2_PREDIV2) >> 4U) + 1U;
pll2mull = ((RCC->CFGR2 & RCC_CFGR2_PLL2MUL) >> 8U) + 2U;
SystemCoreClock = (((HSE_VALUE / prediv2factor) * pll2mull) / prediv1factor) * pllmull;
}
}
#endif /* STM32F105xC */
break;
default:
SystemCoreClock = HSI_VALUE;
break;
}
/* Compute HCLK clock frequency ----------------*/
/* Get HCLK prescaler */
tmp = AHBPrescTable[((RCC->CFGR & RCC_CFGR_HPRE) >> 4U)];
/* HCLK clock frequency */
SystemCoreClock >>= tmp;
}
#if defined(STM32F100xE) || defined(STM32F101xE) || defined(STM32F101xG) || defined(STM32F103xE) || defined(STM32F103xG)
/**
* @brief Setup the external memory controller. Called in startup_stm32f1xx.s
* before jump to __main
* @param None
* @retval None
*/
#ifdef DATA_IN_ExtSRAM
/**
* @brief Setup the external memory controller.
* Called in startup_stm32f1xx_xx.s/.c before jump to main.
* This function configures the external SRAM mounted on STM3210E-EVAL
* board (STM32 High density devices). This SRAM will be used as program
* data memory (including heap and stack).
* @param None
* @retval None
*/
void SystemInit_ExtMemCtl(void)
{
__IO uint32_t tmpreg;
/*!< FSMC Bank1 NOR/SRAM3 is used for the STM3210E-EVAL, if another Bank is
required, then adjust the Register Addresses */
/* Enable FSMC clock */
RCC->AHBENR = 0x00000114U;
/* Delay after an RCC peripheral clock enabling */
tmpreg = READ_BIT(RCC->AHBENR, RCC_AHBENR_FSMCEN);
/* Enable GPIOD, GPIOE, GPIOF and GPIOG clocks */
RCC->APB2ENR = 0x000001E0U;
/* Delay after an RCC peripheral clock enabling */
tmpreg = READ_BIT(RCC->APB2ENR, RCC_APB2ENR_IOPDEN);
(void)(tmpreg);
/* --------------- SRAM Data lines, NOE and NWE configuration ---------------*/
/*---------------- SRAM Address lines configuration -------------------------*/
/*---------------- NOE and NWE configuration --------------------------------*/
/*---------------- NE3 configuration ----------------------------------------*/
/*---------------- NBL0, NBL1 configuration ---------------------------------*/
GPIOD->CRL = 0x44BB44BBU;
GPIOD->CRH = 0xBBBBBBBBU;
GPIOE->CRL = 0xB44444BBU;
GPIOE->CRH = 0xBBBBBBBBU;
GPIOF->CRL = 0x44BBBBBBU;
GPIOF->CRH = 0xBBBB4444U;
GPIOG->CRL = 0x44BBBBBBU;
GPIOG->CRH = 0x444B4B44U;
/*---------------- FSMC Configuration ---------------------------------------*/
/*---------------- Enable FSMC Bank1_SRAM Bank ------------------------------*/
FSMC_Bank1->BTCR[4U] = 0x00001091U;
FSMC_Bank1->BTCR[5U] = 0x00110212U;
}
#endif /* DATA_IN_ExtSRAM */
#endif /* STM32F100xE || STM32F101xE || STM32F101xG || STM32F103xE || STM32F103xG */
/**
* @}
*/
/**
* @}
*/
/**
* @}
*/
Core/Src/usart.c
+122
View File
@@ -0,0 +1,122 @@
/* USER CODE BEGIN Header */
/**
******************************************************************************
* @file usart.c
* @brief This file provides code for the configuration
* of the USART instances.
******************************************************************************
* @attention
*
* Copyright (c) 2025 STMicroelectronics.
* All rights reserved.
*
* This software is licensed under terms that can be found in the LICENSE file
* in the root directory of this software component.
* If no LICENSE file comes with this software, it is provided AS-IS.
*
******************************************************************************
*/
/* USER CODE END Header */
/* Includes ------------------------------------------------------------------*/
#include "usart.h"
/* USER CODE BEGIN 0 */
/* USER CODE END 0 */
UART_HandleTypeDef huart1;
/* USART1 init function */
void MX_USART1_UART_Init(void)
{
/* USER CODE BEGIN USART1_Init 0 */
/* USER CODE END USART1_Init 0 */
/* USER CODE BEGIN USART1_Init 1 */
/* USER CODE END USART1_Init 1 */
huart1.Instance = USART1;
huart1.Init.BaudRate = 115200;
huart1.Init.WordLength = UART_WORDLENGTH_8B;
huart1.Init.StopBits = UART_STOPBITS_1;
huart1.Init.Parity = UART_PARITY_NONE;
huart1.Init.Mode = UART_MODE_TX_RX;
huart1.Init.HwFlowCtl = UART_HWCONTROL_NONE;
huart1.Init.OverSampling = UART_OVERSAMPLING_16;
if (HAL_UART_Init(&huart1) != HAL_OK)
{
Error_Handler();
}
/* USER CODE BEGIN USART1_Init 2 */
/* USER CODE END USART1_Init 2 */
}
void HAL_UART_MspInit(UART_HandleTypeDef* uartHandle)
{
GPIO_InitTypeDef GPIO_InitStruct = {0};
if(uartHandle->Instance==USART1)
{
/* USER CODE BEGIN USART1_MspInit 0 */
/* USER CODE END USART1_MspInit 0 */
/* USART1 clock enable */
__HAL_RCC_USART1_CLK_ENABLE();
__HAL_RCC_GPIOA_CLK_ENABLE();
/**USART1 GPIO Configuration
PA9 ------> USART1_TX
PA10 ------> USART1_RX
*/
GPIO_InitStruct.Pin = GPIO_PIN_9;
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
GPIO_InitStruct.Pin = GPIO_PIN_10;
GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
GPIO_InitStruct.Pull = GPIO_NOPULL;
HAL_GPIO_Init(GPIOA, &GPIO_InitStruct);
/* USART1 interrupt Init */
HAL_NVIC_SetPriority(USART1_IRQn, 0, 0);
HAL_NVIC_EnableIRQ(USART1_IRQn);
/* USER CODE BEGIN USART1_MspInit 1 */
/* USER CODE END USART1_MspInit 1 */
}
}
void HAL_UART_MspDeInit(UART_HandleTypeDef* uartHandle)
{
if(uartHandle->Instance==USART1)
{
/* USER CODE BEGIN USART1_MspDeInit 0 */
/* USER CODE END USART1_MspDeInit 0 */
/* Peripheral clock disable */
__HAL_RCC_USART1_CLK_DISABLE();
/**USART1 GPIO Configuration
PA9 ------> USART1_TX
PA10 ------> USART1_RX
*/
HAL_GPIO_DeInit(GPIOA, GPIO_PIN_9|GPIO_PIN_10);
/* USART1 interrupt Deinit */
HAL_NVIC_DisableIRQ(USART1_IRQn);
/* USER CODE BEGIN USART1_MspDeInit 1 */
/* USER CODE END USART1_MspDeInit 1 */
}
}
/* USER CODE BEGIN 1 */
/* USER CODE END 1 */